注册
登录
Linux/Unix
wooden-bits-fpga
返回
项目作者:
tuna-f1sh
项目描述 :
Attempt to learn Verilog by porting my binary clock 'Wooden Bits' to Verilog and a Lattice chip.
高级语言:
Verilog
项目主页:
项目地址:
git://github.com/tuna-f1sh/wooden-bits-fpga.git
创建时间:
2018-12-03T08:23:35Z
项目社区:
https://github.com/tuna-f1sh/wooden-bits-fpga
开源协议:
GNU General Public License v3.0
下载